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@@ -67,7 +67,7 @@ static void fusb_write_buf(uint8_t addr, uint8_t size, const uint8_t *buf)
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i2cMasterTransmit(&I2CD2, FUSB302B_ADDR, txbuf, size + 1, NULL, 0);
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}
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-void fusb_send_message(const union pd_msg *msg)
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+void fusb_send_message(struct pdb_fusb_config *cfg, const union pd_msg *msg)
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{
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/* Token sequences for the FUSB302B */
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static uint8_t sop_seq[5] = {
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@@ -85,7 +85,7 @@ void fusb_send_message(const union pd_msg *msg)
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};
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/* Take the I2C2 mutex now so there can't be a race condition on sop_seq */
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- i2cAcquireBus(&I2CD2);
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+ i2cAcquireBus(cfg->i2cp);
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/* Get the length of the message: a two-octet header plus NUMOBJ four-octet
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* data objects */
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@@ -99,15 +99,15 @@ void fusb_send_message(const union pd_msg *msg)
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fusb_write_buf(FUSB_FIFOS, msg_len, msg->bytes);
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fusb_write_buf(FUSB_FIFOS, 4, eop_seq);
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- i2cReleaseBus(&I2CD2);
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+ i2cReleaseBus(cfg->i2cp);
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}
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-uint8_t fusb_read_message(union pd_msg *msg)
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+uint8_t fusb_read_message(struct pdb_fusb_config *cfg, union pd_msg *msg)
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{
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uint8_t garbage[4];
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uint8_t numobj;
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- i2cAcquireBus(&I2CD2);
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+ i2cAcquireBus(cfg->i2cp);
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/* If this isn't an SOP message, return error.
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* Because of our configuration, we should be able to assume this means the
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@@ -128,18 +128,18 @@ uint8_t fusb_read_message(union pd_msg *msg)
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/* Throw the CRC32 in the garbage, since the PHY already checked it. */
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fusb_read_buf(FUSB_FIFOS, 4, garbage);
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- i2cReleaseBus(&I2CD2);
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+ i2cReleaseBus(cfg->i2cp);
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return 0;
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}
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-void fusb_send_hardrst(void)
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+void fusb_send_hardrst(struct pdb_fusb_config *cfg)
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{
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- i2cAcquireBus(&I2CD2);
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+ i2cAcquireBus(cfg->i2cp);
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/* Send a hard reset */
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fusb_write_byte(FUSB_CONTROL3, 0x07 | FUSB_CONTROL3_SEND_HARD_RESET);
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- i2cReleaseBus(&I2CD2);
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+ i2cReleaseBus(cfg->i2cp);
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}
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void fusb_setup(struct pdb_fusb_config *cfg)
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@@ -189,32 +189,32 @@ void fusb_setup(struct pdb_fusb_config *cfg)
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i2cReleaseBus(cfg->i2cp);
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}
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-void fusb_get_status(union fusb_status *status)
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+void fusb_get_status(struct pdb_fusb_config *cfg, union fusb_status *status)
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{
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- i2cAcquireBus(&I2CD2);
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+ i2cAcquireBus(cfg->i2cp);
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/* Read the interrupt and status flags into status */
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fusb_read_buf(FUSB_STATUS0A, 7, status->bytes);
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- i2cReleaseBus(&I2CD2);
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+ i2cReleaseBus(cfg->i2cp);
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}
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-enum fusb_typec_current fusb_get_typec_current(void)
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+enum fusb_typec_current fusb_get_typec_current(struct pdb_fusb_config *cfg)
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{
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- i2cAcquireBus(&I2CD2);
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+ i2cAcquireBus(cfg->i2cp);
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/* Read the BC_LVL into a variable */
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enum fusb_typec_current bc_lvl = fusb_read_byte(FUSB_STATUS0)
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& FUSB_STATUS0_BC_LVL;
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- i2cReleaseBus(&I2CD2);
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+ i2cReleaseBus(cfg->i2cp);
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return bc_lvl;
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}
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-void fusb_reset(void)
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+void fusb_reset(struct pdb_fusb_config *cfg)
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{
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- i2cAcquireBus(&I2CD2);
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+ i2cAcquireBus(cfg->i2cp);
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/* Flush the TX buffer */
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fusb_write_byte(FUSB_CONTROL0, 0x44);
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@@ -223,5 +223,5 @@ void fusb_reset(void)
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/* Reset the PD logic */
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fusb_write_byte(FUSB_RESET, FUSB_RESET_PD_RESET);
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- i2cReleaseBus(&I2CD2);
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+ i2cReleaseBus(cfg->i2cp);
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}
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