PD Buddy Sink Firmware
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fusb302b.c 7.0KB

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  1. /*
  2. * PD Buddy Firmware Library - USB Power Delivery for everyone
  3. * Copyright 2017-2018 Clayton G. Hobbs
  4. *
  5. * Licensed under the Apache License, Version 2.0 (the "License");
  6. * you may not use this file except in compliance with the License.
  7. * You may obtain a copy of the License at
  8. *
  9. * http://www.apache.org/licenses/LICENSE-2.0
  10. *
  11. * Unless required by applicable law or agreed to in writing, software
  12. * distributed under the License is distributed on an "AS IS" BASIS,
  13. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  14. * See the License for the specific language governing permissions and
  15. * limitations under the License.
  16. */
  17. #include "fusb302b.h"
  18. #include <ch.h>
  19. #include <hal.h>
  20. #include <pd.h>
  21. /*
  22. * Read a single byte from the FUSB302B
  23. *
  24. * cfg: The FUSB302B to communicate with
  25. * addr: The memory address from which to read
  26. *
  27. * Returns the value read from addr.
  28. */
  29. static uint8_t fusb_read_byte(struct pdb_fusb_config *cfg, uint8_t addr)
  30. {
  31. uint8_t buf;
  32. i2cMasterTransmit(cfg->i2cp, cfg->addr, &addr, 1, &buf, 1);
  33. return buf;
  34. }
  35. /*
  36. * Read multiple bytes from the FUSB302B
  37. *
  38. * cfg: The FUSB302B to communicate with
  39. * addr: The memory address from which to read
  40. * size: The number of bytes to read
  41. * buf: The buffer into which data will be read
  42. */
  43. static void fusb_read_buf(struct pdb_fusb_config *cfg, uint8_t addr,
  44. uint8_t size, uint8_t *buf)
  45. {
  46. i2cMasterTransmit(cfg->i2cp, cfg->addr, &addr, 1, buf, size);
  47. }
  48. /*
  49. * Write a single byte to the FUSB302B
  50. *
  51. * cfg: The FUSB302B to communicate with
  52. * addr: The memory address to which we will write
  53. * byte: The value to write
  54. */
  55. static void fusb_write_byte(struct pdb_fusb_config *cfg, uint8_t addr,
  56. uint8_t byte)
  57. {
  58. uint8_t buf[2] = {addr, byte};
  59. i2cMasterTransmit(cfg->i2cp, cfg->addr, buf, 2, NULL, 0);
  60. }
  61. /*
  62. * Write multiple bytes to the FUSB302B
  63. *
  64. * cfg: The FUSB302B to communicate with
  65. * addr: The memory address to which we will write
  66. * size: The number of bytes to write
  67. * buf: The buffer to write
  68. */
  69. static void fusb_write_buf(struct pdb_fusb_config *cfg, uint8_t addr,
  70. uint8_t size, const uint8_t *buf)
  71. {
  72. uint8_t txbuf[size + 1];
  73. /* Prepare the transmit buffer */
  74. txbuf[0] = addr;
  75. for (int i = 0; i < size; i++) {
  76. txbuf[i + 1] = buf[i];
  77. }
  78. i2cMasterTransmit(cfg->i2cp, cfg->addr, txbuf, size + 1, NULL, 0);
  79. }
  80. void fusb_send_message(struct pdb_fusb_config *cfg, const union pd_msg *msg)
  81. {
  82. /* Token sequences for the FUSB302B */
  83. static uint8_t sop_seq[5] = {
  84. FUSB_FIFO_TX_SOP1,
  85. FUSB_FIFO_TX_SOP1,
  86. FUSB_FIFO_TX_SOP1,
  87. FUSB_FIFO_TX_SOP2,
  88. FUSB_FIFO_TX_PACKSYM
  89. };
  90. static uint8_t eop_seq[4] = {
  91. FUSB_FIFO_TX_JAM_CRC,
  92. FUSB_FIFO_TX_EOP,
  93. FUSB_FIFO_TX_TXOFF,
  94. FUSB_FIFO_TX_TXON
  95. };
  96. /* Take the I2C2 mutex now so there can't be a race condition on sop_seq */
  97. i2cAcquireBus(cfg->i2cp);
  98. /* Get the length of the message: a two-octet header plus NUMOBJ four-octet
  99. * data objects */
  100. uint8_t msg_len = 2 + 4 * PD_NUMOBJ_GET(msg);
  101. /* Set the number of bytes to be transmitted in the packet */
  102. sop_seq[4] = FUSB_FIFO_TX_PACKSYM | msg_len;
  103. /* Write all three parts of the message to the TX FIFO */
  104. fusb_write_buf(cfg, FUSB_FIFOS, 5, sop_seq);
  105. fusb_write_buf(cfg, FUSB_FIFOS, msg_len, msg->bytes);
  106. fusb_write_buf(cfg, FUSB_FIFOS, 4, eop_seq);
  107. i2cReleaseBus(cfg->i2cp);
  108. }
  109. uint8_t fusb_read_message(struct pdb_fusb_config *cfg, union pd_msg *msg)
  110. {
  111. uint8_t garbage[4];
  112. uint8_t numobj;
  113. i2cAcquireBus(cfg->i2cp);
  114. /* If this isn't an SOP message, return error.
  115. * Because of our configuration, we should be able to assume this means the
  116. * buffer is empty, and not try to read past a non-SOP message. */
  117. if ((fusb_read_byte(cfg, FUSB_FIFOS) & FUSB_FIFO_RX_TOKEN_BITS)
  118. != FUSB_FIFO_RX_SOP) {
  119. i2cReleaseBus(cfg->i2cp);
  120. return 1;
  121. }
  122. /* Read the message header into msg */
  123. fusb_read_buf(cfg, FUSB_FIFOS, 2, msg->bytes);
  124. /* Get the number of data objects */
  125. numobj = PD_NUMOBJ_GET(msg);
  126. /* If there is at least one data object, read the data objects */
  127. if (numobj > 0) {
  128. fusb_read_buf(cfg, FUSB_FIFOS, numobj * 4, msg->bytes + 2);
  129. }
  130. /* Throw the CRC32 in the garbage, since the PHY already checked it. */
  131. fusb_read_buf(cfg, FUSB_FIFOS, 4, garbage);
  132. i2cReleaseBus(cfg->i2cp);
  133. return 0;
  134. }
  135. void fusb_send_hardrst(struct pdb_fusb_config *cfg)
  136. {
  137. i2cAcquireBus(cfg->i2cp);
  138. /* Send a hard reset */
  139. fusb_write_byte(cfg, FUSB_CONTROL3, 0x07 | FUSB_CONTROL3_SEND_HARD_RESET);
  140. i2cReleaseBus(cfg->i2cp);
  141. }
  142. void fusb_setup(struct pdb_fusb_config *cfg)
  143. {
  144. i2cAcquireBus(cfg->i2cp);
  145. /* Fully reset the FUSB302B */
  146. fusb_write_byte(cfg, FUSB_RESET, FUSB_RESET_SW_RES);
  147. /* Turn on all power */
  148. fusb_write_byte(cfg, FUSB_POWER, 0x0F);
  149. /* Set interrupt masks */
  150. fusb_write_byte(cfg, FUSB_MASK1, 0x00);
  151. fusb_write_byte(cfg, FUSB_MASKA, 0x00);
  152. fusb_write_byte(cfg, FUSB_MASKB, 0x00);
  153. fusb_write_byte(cfg, FUSB_CONTROL0, 0x04);
  154. /* Enable automatic retransmission */
  155. fusb_write_byte(cfg, FUSB_CONTROL3, 0x07);
  156. /* Flush the RX buffer */
  157. fusb_write_byte(cfg, FUSB_CONTROL1, FUSB_CONTROL1_RX_FLUSH);
  158. /* Measure CC1 */
  159. fusb_write_byte(cfg, FUSB_SWITCHES0, 0x07);
  160. chThdSleepMicroseconds(250);
  161. uint8_t cc1 = fusb_read_byte(cfg, FUSB_STATUS0) & FUSB_STATUS0_BC_LVL;
  162. /* Measure CC2 */
  163. fusb_write_byte(cfg, FUSB_SWITCHES0, 0x0B);
  164. chThdSleepMicroseconds(250);
  165. uint8_t cc2 = fusb_read_byte(cfg, FUSB_STATUS0) & FUSB_STATUS0_BC_LVL;
  166. /* Select the correct CC line for BMC signaling; also enable AUTO_CRC */
  167. if (cc1 > cc2) {
  168. fusb_write_byte(cfg, FUSB_SWITCHES1, 0x25);
  169. fusb_write_byte(cfg, FUSB_SWITCHES0, 0x07);
  170. } else {
  171. fusb_write_byte(cfg, FUSB_SWITCHES1, 0x26);
  172. fusb_write_byte(cfg, FUSB_SWITCHES0, 0x0B);
  173. }
  174. /* Reset the PD logic */
  175. fusb_write_byte(cfg, FUSB_RESET, FUSB_RESET_PD_RESET);
  176. i2cReleaseBus(cfg->i2cp);
  177. }
  178. void fusb_get_status(struct pdb_fusb_config *cfg, union fusb_status *status)
  179. {
  180. i2cAcquireBus(cfg->i2cp);
  181. /* Read the interrupt and status flags into status */
  182. fusb_read_buf(cfg, FUSB_STATUS0A, 7, status->bytes);
  183. i2cReleaseBus(cfg->i2cp);
  184. }
  185. enum fusb_typec_current fusb_get_typec_current(struct pdb_fusb_config *cfg)
  186. {
  187. i2cAcquireBus(cfg->i2cp);
  188. /* Read the BC_LVL into a variable */
  189. enum fusb_typec_current bc_lvl = fusb_read_byte(cfg, FUSB_STATUS0)
  190. & FUSB_STATUS0_BC_LVL;
  191. i2cReleaseBus(cfg->i2cp);
  192. return bc_lvl;
  193. }
  194. void fusb_reset(struct pdb_fusb_config *cfg)
  195. {
  196. i2cAcquireBus(cfg->i2cp);
  197. /* Flush the TX buffer */
  198. fusb_write_byte(cfg, FUSB_CONTROL0, 0x44);
  199. /* Flush the RX buffer */
  200. fusb_write_byte(cfg, FUSB_CONTROL1, FUSB_CONTROL1_RX_FLUSH);
  201. /* Reset the PD logic */
  202. fusb_write_byte(cfg, FUSB_RESET, FUSB_RESET_PD_RESET);
  203. i2cReleaseBus(cfg->i2cp);
  204. }