PD Buddy Sink Firmware
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fusb302b.h 9.2KB

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  1. /*
  2. * PD Buddy - USB Power Delivery for everyone
  3. * Copyright (C) 2017 Clayton G. Hobbs <clay@lakeserv.net>
  4. *
  5. * This program is free software: you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation, either version 3 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #ifndef PDB_FUSB302B_H
  19. #define PDB_FUSB302B_H
  20. #include <stdint.h>
  21. #include <pdb_fusb.h>
  22. #include "messages.h"
  23. /* I2C addresses of the FUSB302B chips */
  24. #define FUSB302B_ADDR 0x22
  25. #define FUSB302B01_ADDR 0x23
  26. #define FUSB302B10_ADDR 0x24
  27. #define FUSB302B11_ADDR 0x25
  28. /* Device ID register */
  29. #define FUSB_DEVICE_ID 0x01
  30. #define FUSB_DEVICE_ID_VERSION_ID_SHIFT 4
  31. #define FUSB_DEVICE_ID_VERSION_ID (0xF << FUSB_DEVICE_ID_VERSION_ID_SHIFT)
  32. #define FUSB_DEVICE_ID_PRODUCT_ID_SHIFT 2
  33. #define FUSB_DEVICE_ID_PRODUCT_ID (0x3 << FUSB_DEVICE_ID_PRODUCT_ID_SHIFT)
  34. #define FUSB_DEVICE_ID_REVISION_ID_SHIFT 0
  35. #define FUSB_DEVICE_ID_REVISION_ID (0x3 << FUSB_DEVICE_ID_REVISION_ID_SHIFT)
  36. /* Switches0 register */
  37. #define FUSB_SWITCHES0 0x02
  38. #define FUSB_SWITCHES0_PU_EN2 (1 << 7)
  39. #define FUSB_SWITCHES0_PU_EN1 (1 << 6)
  40. #define FUSB_SWITCHES0_VCONN_CC2 (1 << 5)
  41. #define FUSB_SWITCHES0_VCONN_CC1 (1 << 4)
  42. #define FUSB_SWITCHES0_MEAS_CC2 (1 << 3)
  43. #define FUSB_SWITCHES0_MEAS_CC1 (1 << 2)
  44. #define FUSB_SWITCHES0_PDWN_2 (1 << 1)
  45. #define FUSB_SWITCHES0_PDWN_1 1
  46. /* Switches1 register */
  47. #define FUSB_SWITCHES1 0x03
  48. #define FUSB_SWITCHES1_POWERROLE (1 << 7)
  49. #define FUSB_SWITCHES1_SPECREV_SHIFT 5
  50. #define FUSB_SWITCHES1_SPECREV (0x3 << FUSB_SWITCHES1_SPECREV_SHIFT)
  51. #define FUSB_SWITCHES1_DATAROLE (1 << 4)
  52. #define FUSB_SWITCHES1_AUTO_CRC (1 << 2)
  53. #define FUSB_SWITCHES1_TXCC2 (1 << 1)
  54. #define FUSB_SWITCHES1_TXCC1 1
  55. /* Measure register */
  56. #define FUSB_MEASURE 0x04
  57. #define FUSB_MEASURE_MEAS_VBUS (1 << 6)
  58. #define FUSB_MEASURE_MDAC_SHIFT 0
  59. #define FUSB_MEASURE_MDAC (0x3F << FUSB_MEASURE_MDAC_SHIFT)
  60. /* Slice register */
  61. #define FUSB_SLICE 0x05
  62. #define FUSB_SLICE_SDAC_HYS_SHIFT 6
  63. #define FUSB_SLICE_SDAC_HYS (0x3 << FUSB_SLICE_SDAC_HYS_SHIFT)
  64. #define FUSB_SLICE_SDAC_SHIFT 0
  65. #define FUSB_SLICE_SDAC (0x3F << FUSB_SLICE_SDAC_SHIFT)
  66. /* Control0 register */
  67. #define FUSB_CONTROL0 0x06
  68. #define FUSB_CONTROL0_TX_FLUSH (1 << 6)
  69. #define FUSB_CONTROL0_INT_MASK (1 << 5)
  70. #define FUSB_CONTROL0_HOST_CUR_SHIFT 2
  71. #define FUSB_CONTROL0_HOST_CUR (0x3 << FUSB_CONTROL0_HOST_CUR_SHIFT)
  72. #define FUSB_CONTROL0_AUTO_PRE (1 << 1)
  73. #define FUSB_CONTROL0_TX_START 1
  74. /* Control1 register */
  75. #define FUSB_CONTROL1 0x07
  76. #define FUSB_CONTROL1_ENSOP2DB (1 << 6)
  77. #define FUSB_CONTROL1_ENSOP1DB (1 << 5)
  78. #define FUSB_CONTROL1_BIST_MODE2 (1 << 4)
  79. #define FUSB_CONTROL1_RX_FLUSH (1 << 2)
  80. #define FUSB_CONTROL1_ENSOP2 (1 << 1)
  81. #define FUSB_CONTROL1_ENSOP1 1
  82. /* Control2 register */
  83. #define FUSB_CONTROL2 0x08
  84. #define FUSB_CONTROL2_TOG_SAVE_PWR_SHIFT 6
  85. #define FUSB_CONTROL2_TOG_SAVE_PWR (0x3 << FUSB_CONTROL2_TOG_SAVE_PWR)
  86. #define FUSB_CONTROL2_TOG_RD_ONLY (1 << 5)
  87. #define FUSB_CONTROL2_WAKE_EN (1 << 3)
  88. #define FUSB_CONTROL2_MODE_SHIFT 1
  89. #define FUSB_CONTROL2_MODE (0x3 << FUSB_CONTROL2_MODE_SHIFT)
  90. #define FUSB_CONTROL2_TOGGLE 1
  91. /* Control3 register */
  92. #define FUSB_CONTROL3 0x09
  93. #define FUSB_CONTROL3_SEND_HARD_RESET (1 << 6)
  94. #define FUSB_CONTROL3_BIST_TMODE (1 << 5)
  95. #define FUSB_CONTROL3_AUTO_HARDRESET (1 << 4)
  96. #define FUSB_CONTROL3_AUTO_SOFTRESET (1 << 3)
  97. #define FUSB_CONTROL3_N_RETRIES_SHIFT 1
  98. #define FUSB_CONTROL3_N_RETRIES (0x3 << FUSB_CONTROL3_N_RETRIES_SHIFT)
  99. #define FUSB_CONTROL3_AUTO_RETRY 1
  100. /* Mask1 register */
  101. #define FUSB_MASK1 0x0A
  102. #define FUSB_MASK1_M_VBUSOK (1 << 7)
  103. #define FUSB_MASK1_M_ACTIVITY (1 << 6)
  104. #define FUSB_MASK1_M_COMP_CHNG (1 << 5)
  105. #define FUSB_MASK1_M_CRC_CHK (1 << 4)
  106. #define FUSB_MASK1_M_ALERT (1 << 3)
  107. #define FUSB_MASK1_M_WAKE (1 << 2)
  108. #define FUSB_MASK1_M_COLLISION (1 << 1)
  109. #define FUSB_MASK1_M_BC_LVL (1 << 0)
  110. /* Power register */
  111. #define FUSB_POWER 0x0B
  112. #define FUSB_POWER_PWR3 (1 << 3)
  113. #define FUSB_POWER_PWR2 (1 << 2)
  114. #define FUSB_POWER_PWR1 (1 << 1)
  115. #define FUSB_POWER_PWR0 1
  116. /* Reset register */
  117. #define FUSB_RESET 0x0C
  118. #define FUSB_RESET_PD_RESET (1 << 1)
  119. #define FUSB_RESET_SW_RES 1
  120. /* OCPreg register */
  121. #define FUSB_OCPREG 0x0D
  122. #define FUSB_OCPREG_OCP_RANGE (1 << 3)
  123. #define FUSB_OCPREG_OCP_CUR_SHIFT 0
  124. #define FUSB_OCPREG_OCP_CUR (0x7 << FUSB_OCPREG_OCP_CUR_SHIFT)
  125. /* Maska register */
  126. #define FUSB_MASKA 0x0E
  127. #define FUSB_MASKA_M_OCP_TEMP (1 << 7)
  128. #define FUSB_MASKA_M_TOGDONE (1 << 6)
  129. #define FUSB_MASKA_M_SOFTFAIL (1 << 5)
  130. #define FUSB_MASKA_M_RETRYFAIL (1 << 4)
  131. #define FUSB_MASKA_M_HARDSENT (1 << 3)
  132. #define FUSB_MASKA_M_TXSENT (1 << 2)
  133. #define FUSB_MASKA_M_SOFTRST (1 << 1)
  134. #define FUSB_MASKA_M_HARDRST 1
  135. /* Maskb register */
  136. #define FUSB_MASKB 0x0F
  137. #define FUSB_MASKB_M_GCRCSENT 1
  138. /* Control4 register */
  139. #define FUSB_CONTROL4 0x10
  140. #define FUSB_CONTROL4_TOG_EXIT_AUD 1
  141. /* Status0a register */
  142. #define FUSB_STATUS0A 0x3C
  143. #define FUSB_STATUS0A_SOFTFAIL (1 << 5)
  144. #define FUSB_STATUS0A_RETRYFAIL (1 << 4)
  145. #define FUSB_STATUS0A_POWER3 (1 << 3)
  146. #define FUSB_STATUS0A_POWER2 (1 << 2)
  147. #define FUSB_STATUS0A_SOFTRST (1 << 1)
  148. #define FUSB_STATUS0A_HARDRST 1
  149. /* Status1a register */
  150. #define FUSB_STATUS1A 0x3D
  151. #define FUSB_STATUS1A_TOGSS_SHIFT 3
  152. #define FUSB_STATUS1A_TOGSS (0x7 << FUSB_STATUS1A_TOGSS_SHIFT)
  153. #define FUSB_STATUS1A_RXSOP2DB (1 << 2)
  154. #define FUSB_STATUS1A_RXSOP1DB (1 << 1)
  155. #define FUSB_STATUS1A_RXSOP 1
  156. /* Interrupta register */
  157. #define FUSB_INTERRUPTA 0x3E
  158. #define FUSB_INTERRUPTA_I_OCP_TEMP (1 << 7)
  159. #define FUSB_INTERRUPTA_I_TOGDONE (1 << 6)
  160. #define FUSB_INTERRUPTA_I_SOFTFAIL (1 << 5)
  161. #define FUSB_INTERRUPTA_I_RETRYFAIL (1 << 4)
  162. #define FUSB_INTERRUPTA_I_HARDSENT (1 << 3)
  163. #define FUSB_INTERRUPTA_I_TXSENT (1 << 2)
  164. #define FUSB_INTERRUPTA_I_SOFTRST (1 << 1)
  165. #define FUSB_INTERRUPTA_I_HARDRST 1
  166. /* Interruptb register */
  167. #define FUSB_INTERRUPTB 0x3F
  168. #define FUSB_INTERRUPTB_I_GCRCSENT 1
  169. /* Status0 register */
  170. #define FUSB_STATUS0 0x40
  171. #define FUSB_STATUS0_VBUSOK (1 << 7)
  172. #define FUSB_STATUS0_ACTIVITY (1 << 6)
  173. #define FUSB_STATUS0_COMP (1 << 5)
  174. #define FUSB_STATUS0_CRC_CHK (1 << 4)
  175. #define FUSB_STATUS0_ALERT (1 << 3)
  176. #define FUSB_STATUS0_WAKE (1 << 2)
  177. #define FUSB_STATUS0_BC_LVL_SHIFT 0
  178. #define FUSB_STATUS0_BC_LVL (0x3 << FUSB_STATUS0_BC_LVL_SHIFT)
  179. /* Status1 register */
  180. #define FUSB_STATUS1 0x41
  181. #define FUSB_STATUS1_RXSOP2 (1 << 7)
  182. #define FUSB_STATUS1_RXSOP1 (1 << 6)
  183. #define FUSB_STATUS1_RX_EMPTY (1 << 5)
  184. #define FUSB_STATUS1_RX_FULL (1 << 4)
  185. #define FUSB_STATUS1_TX_EMPTY (1 << 3)
  186. #define FUSB_STATUS1_TX_FULL (1 << 2)
  187. #define FUSB_STATUS1_OVRTEMP (1 << 1)
  188. #define FUSB_STATUS1_OCP 1
  189. /* Interrupt register */
  190. #define FUSB_INTERRUPT 0x42
  191. #define FUSB_INTERRUPT_I_VBUSOK (1 << 7)
  192. #define FUSB_INTERRUPT_I_ACTIVITY (1 << 6)
  193. #define FUSB_INTERRUPT_I_COMP_CHNG (1 << 5)
  194. #define FUSB_INTERRUPT_I_CRC_CHK (1 << 4)
  195. #define FUSB_INTERRUPT_I_ALERT (1 << 3)
  196. #define FUSB_INTERRUPT_I_WAKE (1 << 2)
  197. #define FUSB_INTERRUPT_I_COLLISION (1 << 1)
  198. #define FUSB_INTERRUPT_I_BC_LVL 1
  199. /* FIFOs register */
  200. #define FUSB_FIFOS 0x43
  201. #define FUSB_FIFO_TX_TXON 0xA1
  202. #define FUSB_FIFO_TX_SOP1 0x12
  203. #define FUSB_FIFO_TX_SOP2 0x13
  204. #define FUSB_FIFO_TX_SOP3 0x1B
  205. #define FUSB_FIFO_TX_RESET1 0x15
  206. #define FUSB_FIFO_TX_RESET2 0x16
  207. #define FUSB_FIFO_TX_PACKSYM 0x80
  208. #define FUSB_FIFO_TX_JAM_CRC 0xFF
  209. #define FUSB_FIFO_TX_EOP 0x14
  210. #define FUSB_FIFO_TX_TXOFF 0xFE
  211. #define FUSB_FIFO_RX_TOKEN_BITS 0xE0
  212. #define FUSB_FIFO_RX_SOP 0xE0
  213. #define FUSB_FIFO_RX_SOP1 0xC0
  214. #define FUSB_FIFO_RX_SOP2 0xA0
  215. #define FUSB_FIFO_RX_SOP1DB 0x80
  216. #define FUSB_FIFO_RX_SOP2DB 0x60
  217. /*
  218. * FUSB status union
  219. *
  220. * Provides a nicer structure than just an array of uint8_t for working with
  221. * the FUSB302B status and interrupt flags.
  222. */
  223. union fusb_status {
  224. uint8_t bytes[7];
  225. struct {
  226. uint8_t status0a;
  227. uint8_t status1a;
  228. uint8_t interrupta;
  229. uint8_t interruptb;
  230. uint8_t status0;
  231. uint8_t status1;
  232. uint8_t interrupt;
  233. };
  234. };
  235. /*
  236. * FUSB Type-C Current level enum
  237. */
  238. enum fusb_typec_current {
  239. fusb_tcc_none = 0,
  240. fusb_tcc_default = 1,
  241. fusb_tcc_1_5 = 2,
  242. fusb_tcc_3_0 = 3
  243. };
  244. /* FUSB functions */
  245. /*
  246. * Send a USB Power Delivery message to the FUSB302B
  247. */
  248. void fusb_send_message(struct pdb_fusb_config *cfg, const union pd_msg *msg);
  249. /*
  250. * Read a USB Power Delivery message from the FUSB302B
  251. */
  252. uint8_t fusb_read_message(struct pdb_fusb_config *cfg, union pd_msg *msg);
  253. /*
  254. * Tell the FUSB302B to send a hard reset signal
  255. */
  256. void fusb_send_hardrst(struct pdb_fusb_config *cfg);
  257. /*
  258. * Read the FUSB302B status and interrupt flags into *status
  259. */
  260. void fusb_get_status(struct pdb_fusb_config *cfg, union fusb_status *status);
  261. /*
  262. * Read the FUSB302B BC_LVL as an enum fusb_typec_current
  263. */
  264. enum fusb_typec_current fusb_get_typec_current(struct pdb_fusb_config *cfg);
  265. /*
  266. * Initialization routine for the FUSB302B
  267. */
  268. void fusb_setup(struct pdb_fusb_config *);
  269. /*
  270. * Reset the FUSB302B
  271. */
  272. void fusb_reset(struct pdb_fusb_config *cfg);
  273. #endif /* PDB_FUSB302B_H */