Added old KiCAD project and LICENSE

LICENSE

@@ -0,0 +1,189 @@
+CERN Open Hardware Licence v1.2 
+
+Preamble
+
+Through this CERN Open Hardware Licence ("CERN OHL") version 1.2, CERN
+wishes to provide a tool to foster collaboration and sharing among
+hardware designers.  The CERN OHL is copyright CERN. Anyone is welcome
+to use the CERN OHL, in unmodified form only, for the distribution of
+their own Open Hardware designs. Any other right is reserved. Release
+of hardware designs under the CERN OHL does not constitute an
+endorsement of the licensor or its designs nor does it imply any
+involvement by CERN in the development of such designs.
+
+1. Definitions
+
+In this Licence, the following terms have the following meanings:
+ 
+“Licence” means this CERN OHL.
+
+“Documentation” means schematic diagrams, designs, circuit or circuit
+board layouts, mechanical drawings, flow charts and descriptive text,
+and other explanatory material that is explicitly stated as being made
+available under the conditions of this Licence. The Documentation may
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+“Product” means either an entire, or any part of a, device built using
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+“Licensee” means any natural or legal person exercising rights under
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+“Licensor” means any natural or legal person that creates or modifies
+Documentation and subsequently communicates to the public and/ or
+distributes the resulting Documentation under the terms and conditions
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+A Licensee may at the same time be a Licensor, and vice versa. 
+
+Use of the masculine gender includes the feminine and neuter genders
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+2. Applicability
+
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+communication to the public and distribution of the Documentation, and
+the manufacture and distribution of Products. By exercising any right
+granted under this Licence, the Licensee irrevocably accepts these
+terms and conditions.
+
+2.2. This Licence is granted by the Licensor directly to the Licensee,
+and shall apply worldwide and without limitation in time. The Licensee
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+
+2.3. This Licence does not extend to software, firmware, or code
+loaded into programmable devices which may be used in conjunction with
+the Documentation, the modified Documentation or with Products, unless
+such software, firmware, or code is explicitly expressed to be subject
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+otherwise subject to the applicable licence terms and conditions.
+
+3. Copying, modification, communication to the public and distribution
+of the Documentation
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+3.1. The Licensee shall keep intact all copyright and trademarks
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+thereof in every copy of the Documentation or, as the case may be,
+modified Documentation, that he communicates to the public or
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+3.2. The Licensee may copy, communicate to the public and distribute
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+requirements specified in section 3.1.
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+once the Licensee communicates to the public or distributes the
+modified Documentation under section 3.4, and, where required by
+section 4.1, by a recipient of a Product. However, the Licensor shall
+not assert his rights under the foregoing proviso unless or until a
+Product is distributed.
+
+3.4. The Licensee may communicate to the public and distribute the
+modified Documentation (thereby in addition to being a Licensee also
+becoming a Licensor), always provided that he shall:
+
+a) comply with section 3.1;
+
+b) cause the modified Documentation to carry prominent notices stating
+that the Licensee has modified the Documentation, with the date and
+description of the modifications;
+
+c) cause the modified Documentation to carry a new Documentation
+Location notice if the original Documentation provided for one;
+
+d) make available the modified Documentation at the same level of
+abstraction as that of the Documentation, in the preferred format for
+making modifications to it (e.g. the native format of the CAD tool as
+applicable), and in the event that format is proprietary, in a format
+viewable with a tool licensed under an OSI-approved license if the
+proprietary tool can create it; and
+
+e) license the modified Documentation under the terms and conditions
+of this Licence or, where applicable, a later version of this Licence
+as may be issued by CERN.
+
+3.5. The Licence includes a non-exclusive licence to those patents or
+registered designs that are held by, under the control of, or
+sub-licensable by the Licensor, to the extent necessary to make use of
+the rights granted under this Licence. The scope of this section 3.5
+shall be strictly limited to the parts of the Documentation or
+modified Documentation created by the Licensor.
+
+4. Manufacture and distribution of Products
+
+4.1. The Licensee may manufacture or distribute Products always
+provided that, where such manufacture or distribution requires a
+licence under this Licence the Licensee provides to each recipient of
+such Products an easy means of accessing a copy of the Documentation
+or modified Documentation, as applicable, as set out in section 3.
+
+4.2. The Licensee is invited to inform any Licensor who has indicated
+his wish to receive this information about the type, quantity and
+dates of production of Products the Licensee has (had) manufactured
+
+5. Warranty and liability
+
+5.1. DISCLAIMER – The Documentation and any modified Documentation are
+provided "as is" and any express or implied warranties, including, but
+not limited to, implied warranties of merchantability, of satisfactory
+quality, non-infringement of third party rights, and fitness for a
+particular purpose or use are disclaimed in respect of the
+Documentation, the modified Documentation or any Product. The Licensor
+makes no representation that the Documentation, modified
+Documentation, or any Product, does or will not infringe any patent,
+copyright, trade secret or other proprietary right. The entire risk as
+to the use, quality, and performance of a Product shall be with the
+Licensee and not the Licensor. This disclaimer of warranty is an
+essential part of this Licence and a condition for the grant of any
+rights granted under this Licence. The Licensee warrants that it does
+not act in a consumer capacity.
+
+5.2. LIMITATION OF LIABILITY – The Licensor shall have no liability
+for direct, indirect, special, incidental, consequential, exemplary,
+punitive or other damages of any character including, without
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+data or profits, or business interruption, however caused and on any
+theory of contract, warranty, tort (including negligence), product
+liability or otherwise, arising in any way in relation to the
+Documentation, modified Documentation and/or the use, manufacture or
+distribution of a Product, even if advised of the possibility of such
+damages, and the Licensee shall hold the Licensor(s) free and harmless
+from any liability, costs, damages, fees and expenses, including
+claims by third parties, in relation to such use.
+
+6. General
+
+6.1. Except for the rights explicitly granted hereunder, this Licence
+does not imply or represent any transfer or assignment of intellectual
+property rights to the Licensee.
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+6.2. The Licensee shall not use or make reference to any of the names
+(including acronyms and abbreviations), images, or logos under which
+the Licensor is known, save in so far as required to comply with
+section 3. Any such permitted use or reference shall be factual and
+shall in no event suggest any kind of endorsement by the Licensor or
+its personnel of the modified Documentation or any Product, or any
+kind of implication by the Licensor or its personnel in the
+preparation of the modified Documentation or Product.
+
+6.3. CERN may publish updated versions of this Licence which retain
+the same general provisions as this version, but differ in detail so
+far this is required and reasonable. New versions will be published
+with a unique version number.
+
+6.4. This Licence shall terminate with immediate effect, upon written
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+comply with any of its terms and conditions, or if the Licensee
+initiates legal action against Licensor in relation to this
+Licence. Section 5 shall continue to apply.

README.md

@@ -1,3 +1,13 @@
 # arccont
 
-The PCB of an arcade-style USB game controller I made in 2010.
+The PCB of an arcade-style USB game controller I made in 2010.  Based on the
+schematic from [Circuit for USB game controller with 12 inputs (8 buttons + 4
+directions)](http://www.raphnet.net/electronique/usb_game12/index_en.php) by
+Raphaël Assénat and intended for the firmware from the same page.
+
+This was the first circuit board I ever made with an EDA suite, and I admit the
+wasted space is somewhat laughable.  I'm releasing it now under the CERN OHL
+version 1.2, not that there's anything amazing about this board that needs to
+be shared with the world.  Really, if I were to make any more arcade
+controllers like this one today, I'd redesign this board (or buy one from the
+Raphnet shop).

arccont/arccont-Back.plt

@@ -0,0 +1,373 @@
+IN;VS20;PU;PA;SP1;
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arccont/arccont-Front.gtl

@@ -0,0 +1,114 @@
+G04 (created by PCBNEW-RS274X (2010-05-09 BZR 2366)-stable) date Mon 06 Sep 2010 10:30:12 PM EDT*
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+M02*

arccont/arccont-SilkS_Front.plt

@@ -0,0 +1,658 @@
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+PA 3239,6372;
+PU;PA 3198,6386;
+PD;PA 3198,6401;
+PU;PA 3177,6391;
+PD;PA 3230,6391;
+PA 3236,6393;
+PA 3239,6397;
+PA 3239,6401;
+PU;PA 3239,6415;
+PD;PA 3198,6415;
+PU;PA 3209,6415;
+PD;PA 3204,6417;
+PA 3201,6419;
+PA 3198,6423;
+PA 3198,6427;
+PU;PA 3239,6446;
+PD;PA 3236,6442;
+PA 3233,6440;
+PA 3227,6438;
+PA 3209,6438;
+PA 3204,6440;
+PA 3201,6442;
+PA 3198,6446;
+PA 3198,6452;
+PA 3201,6456;
+PA 3204,6458;
+PA 3209,6460;
+PA 3227,6460;
+PA 3233,6458;
+PA 3236,6456;
+PA 3239,6452;
+PA 3239,6446;
+PU;PA 3239,6483;
+PD;PA 3236,6479;
+PA 3230,6477;
+PA 3177,6477;
+PU;PA 3236,6497;
+PD;PA 3239,6500;
+PA 3239,6508;
+PA 3236,6512;
+PA 3230,6514;
+PA 3227,6514;
+PA 3221,6512;
+PA 3218,6508;
+PA 3218,6502;
+PA 3215,6498;
+PA 3209,6497;
+PA 3207,6497;
+PA 3201,6498;
+PA 3198,6502;
+PA 3198,6508;
+PA 3201,6512;
+PU;PA 2100,6512;
+PD;PA 2171,6541;
+PU;PA 2100,6541;
+PD;PA 2171,6512;
+PU;PA 2171,6580;
+PD;PA 2171,6556;
+PU;PA 2171,6568;
+PD;PA 2100,6568;
+PA 2110,6564;
+PA 2117,6560;
+PA 2120,6556;
+PU;PA 1102,7808;
+PD;PA 1102,7765;
+PA 1099,7756;
+PA 1093,7750;
+PA 1084,7747;
+PA 1078,7747;
+PU;PA 1163,7747;
+PD;PA 1128,7747;
+PU;PA 1145,7747;
+PD;PA 1145,7808;
+PA 1140,7800;
+PA 1134,7794;
+PA 1128,7791;
+PU;PA 1045,7553;
+PD;PA 1045,7504;
+PA 1048,7498;
+PA 1051,7495;
+PA 1056,7492;
+PA 1068,7492;
+PA 1074,7495;
+PA 1077,7498;
+PA 1080,7504;
+PA 1080,7553;
+PU;PA 1106,7495;
+PD;PA 1115,7492;
+PA 1129,7492;
+PA 1135,7495;
+PA 1138,7498;
+PA 1141,7504;
+PA 1141,7510;
+PA 1138,7515;
+PA 1135,7518;
+PA 1129,7521;
+PA 1118,7524;
+PA 1112,7527;
+PA 1109,7530;
+PA 1106,7536;
+PA 1106,7542;
+PA 1109,7547;
+PA 1112,7550;
+PA 1118,7553;
+PA 1132,7553;
+PA 1141,7550;
+PU;PA 1188,7524;
+PD;PA 1196,7521;
+PA 1199,7518;
+PA 1202,7512;
+PA 1202,7504;
+PA 1199,7498;
+PA 1196,7495;
+PA 1190,7492;
+PA 1167,7492;
+PA 1167,7553;
+PA 1188,7553;
+PA 1193,7550;
+PA 1196,7547;
+PA 1199,7542;
+PA 1199,7536;
+PA 1196,7530;
+PA 1193,7527;
+PA 1188,7524;
+PA 1167,7524;
+PU;PU;PA;SP0;

arccont/arccont-cache.lib

@@ -0,0 +1,192 @@
+EESchema-LIBRARY Version 2.3  Date: Tue 31 Aug 2010 12:31:28 PM EDT
+#
+# +5V
+#
+DEF +5V #PWR 0 40 Y Y 1 F P
+F0 "#PWR" 0 90 20 H I C CNN
+F1 "+5V" 0 90 30 H V C CNN
+DRAW
+X +5V 1 0 0 0 U 20 20 0 0 W N
+C 0 50 20 0 1 0 N
+P 4 0 1 0  0 0  0 30  0 30  0 30 N
+ENDDRAW
+ENDDEF
+#
+# ATMEGA8-P
+#
+DEF ATMEGA8-P IC 0 40 Y Y 1 F N
+F0 "IC" -700 1250 50 H V L BNN
+F1 "ATMEGA8-P" 250 -1400 50 H V L BNN
+F2 "DIL28" 500 -1475 50 H I C CNN
+$FPLIST
+ 28DIP-ELL600
+ 28dip600
+$ENDFPLIST
+DRAW
+P 2 1 0 0  -700 -1300  -700 1200 N
+P 2 1 0 0  -700 1200  800 1200 N
+P 2 1 0 0  800 -1300  -700 -1300 N
+P 2 1 0 0  800 1200  800 -1300 N
+X PC6(/RESET) 1 -900 1100 200 R 40 40 1 1 B I
+X PD0(RXD) 2 1000 200 200 L 40 40 1 1 B
+X PD1(TXD) 3 1000 100 200 L 40 40 1 1 B
+X PD2(INT0) 4 1000 0 200 L 40 40 1 1 B
+X PD3(INT1) 5 1000 -100 200 L 40 40 1 1 B
+X PD4(XCK/T0) 6 1000 -200 200 L 40 40 1 1 B
+X VCC 7 0 1400 200 D 40 40 1 1 B
+X GND 8 0 -1500 200 U 40 40 1 1 B
+X PB6(XTAL1/TOSC1) 9 -900 400 200 R 40 40 1 1 B
+X PB7(XTAL2/TOSC2) 10 -900 200 200 R 40 40 1 1 B
+X AVCC 20 -900 700 200 R 40 40 1 1 B
+X PD5(T1) 11 1000 -300 200 L 40 40 1 1 B
+X AREF 21 -900 800 200 R 40 40 1 1 B
+X PD6(AIN0) 12 1000 -400 200 L 40 40 1 1 B
+X AGND 22 -900 900 200 R 40 40 1 1 B
+X PD7(AIN1) 13 1000 -500 200 L 40 40 1 1 B
+X PC0(ADC0) 23 1000 1100 200 L 40 40 1 1 B
+X PB0(ICP) 14 1000 -700 200 L 40 40 1 1 B
+X PC1(ADC1) 24 1000 1000 200 L 40 40 1 1 B
+X PB1(OC1A) 15 1000 -800 200 L 40 40 1 1 B
+X PC2(ADC2) 25 1000 900 200 L 40 40 1 1 B
+X PB2(SS/OC1B) 16 1000 -900 200 L 40 40 1 1 B
+X PC3(ADC3) 26 1000 800 200 L 40 40 1 1 B
+X PB3(MOSI/OC2) 17 1000 -1000 200 L 40 40 1 1 B
+X PC4(ADC4/SDA) 27 1000 700 200 L 40 40 1 1 B
+X PB4(MISO) 18 1000 -1100 200 L 40 40 1 1 B
+X PC5(ADC5/SCL) 28 1000 600 200 L 40 40 1 1 B
+X PB5(SCK) 19 1000 -1200 200 L 40 40 1 1 B
+ENDDRAW
+ENDDEF
+#
+# C
+#
+DEF C C 0 10 N Y 1 F N
+F0 "C" 50 100 50 H V L CNN
+F1 "C" 50 -100 50 H V L CNN
+$FPLIST
+ SM*
+ C?
+ C1-1
+$ENDFPLIST
+DRAW
+P 2 0 1 10  -100 -30  100 -30 N
+P 2 0 1 10  -100 30  100 30 N
+X ~ 1 0 200 170 D 40 40 1 1 P
+X ~ 2 0 -200 170 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# CONN_14
+#
+DEF CONN_14 P 0 40 Y N 1 F N
+F0 "P" -30 0 60 V V C CNN
+F1 "CONN_14" 80 0 60 V V C CNN
+DRAW
+S -100 700 150 -700 0 1 0 N
+X P1 1 -350 650 250 R 50 50 1 1 P I
+X P2 2 -350 550 250 R 50 50 1 1 P I
+X P3 3 -350 450 250 R 50 50 1 1 P I
+X P4 4 -350 350 250 R 50 50 1 1 P I
+X P5 5 -350 250 250 R 50 50 1 1 P I
+X P6 6 -350 150 250 R 50 50 1 1 P I
+X P7 7 -350 50 250 R 50 50 1 1 P I
+X P8 8 -350 -50 250 R 50 50 1 1 P I
+X P9 9 -350 -150 250 R 50 50 1 1 P I
+X P10 10 -350 -250 250 R 50 50 1 1 P I
+X P11 11 -350 -350 250 R 50 50 1 1 P I
+X P12 12 -350 -450 250 R 50 50 1 1 P I
+X P13 13 -350 -550 250 R 50 50 1 1 P I
+X P14 14 -350 -650 250 R 50 50 1 1 P I
+ENDDRAW
+ENDDEF
+#
+# CRYSTAL
+#
+DEF CRYSTAL X 0 40 N N 1 F N
+F0 "X" 0 150 60 H V C CNN
+F1 "CRYSTAL" 0 -150 60 H V C CNN
+DRAW
+P 2 0 1 16  -100 100  -100 -100 N
+P 2 0 1 16  100 100  100 -100 N
+P 5 0 1 12  -50 50  50 50  50 -50  -50 -50  -50 50 f
+X 1 1 -300 0 200 R 40 40 1 1 P
+X 2 2 300 0 200 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF ~GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 0 30 H I C CNN
+F1 "GND" 0 -70 30 H I C CNN
+DRAW
+P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
+X GND 1 0 0 0 U 30 30 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# R
+#
+DEF R R 0 0 N Y 1 F N
+F0 "R" 80 0 50 V V C CNN
+F1 "R" 0 0 50 V V C CNN
+$FPLIST
+ R?
+ SM0603
+ SM0805
+ R?-*
+$ENDFPLIST
+DRAW
+S -40 150 40 -150 0 1 12 N
+X ~ 1 0 250 100 D 60 60 1 1 P
+X ~ 2 0 -250 100 U 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# USB
+#
+DEF USB J 0 0 Y Y 1 F N
+F0 "J" -50 400 60 H V C CNN
+F1 "USB" -250 150 60 V V C CNN
+DRAW
+S -100 200 -100 100 0 1 0 N
+S -100 200 -100 200 0 1 0 N
+S -100 200 50 200 0 1 0 N
+S 50 100 -100 100 0 1 0 N
+S 50 100 50 200 0 1 0 N
+P 3 0 1 0  -150 -50  -250 -200  -250 -200 N
+P 3 0 1 0  100 -50  200 -200  200 -200 N
+P 4 0 1 0  -100 -450  -50 -400  -50 -50  -50 -50 N
+P 4 0 1 0  -100 -50  -100 -250  -250 -350  -250 -350 N
+P 4 0 1 0  0 -50  0 -400  50 -450  50 -450 N
+P 4 0 1 0  50 -50  50 -250  200 -350  200 -350 N
+P 6 0 1 0  -200 -50  150 -50  150 350  -200 350  -200 -50  -200 -50 N
+P 9 0 1 0  -150 0  100 0  100 250  50 300  -100 300  -150 250  -150 0  -150 0  -150 0 N
+X Vbus 1 -400 -200 150 R 40 30 1 1 w
+X D- 2 350 -350 150 L 40 30 1 1 B
+X D+ 3 350 -200 150 L 40 30 1 1 B
+X GND 4 -400 -350 150 R 40 30 1 1 w
+X Shield_1 5 350 -450 300 L 40 30 1 1 P
+X Shield_2 6 -400 -450 300 R 40 30 1 1 P
+ENDDRAW
+ENDDEF
+#
+# ZENER
+#
+DEF ZENER D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "ZENER" 0 -100 40 H V C CNN
+$FPLIST
+ D?
+ SO*
+ SM*
+$ENDFPLIST
+DRAW
+P 5 0 1 0  50 0  -50 50  -50 -50  50 0  50 0 F
+P 5 0 1 8  70 50  50 30  50 -30  30 -50  30 -50 N
+X A 1 -200 0 150 R 40 40 1 1 P
+X K 2 200 0 150 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library

arccont/arccont.cmp

@@ -0,0 +1,87 @@
+Cmp-Mod V01 Genere par PcbNew le Mon 18 Oct 2010 11:53:03 AM EDT
+
+BeginCmp
+TimeStamp = /4C79CF5E;
+Reference = C1;
+ValeurCmp = 1µF;
+IdModule  = C1;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79CB04;
+Reference = C2;
+ValeurCmp = 27pf;
+IdModule  = C1;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79CADC;
+Reference = C3;
+ValeurCmp = 27pf;
+IdModule  = C1;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79BF77;
+Reference = D2;
+ValeurCmp = 3.6V;
+IdModule  = D4;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79C2F2;
+Reference = D3;
+ValeurCmp = 3.6V;
+IdModule  = D4;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79BAC2;
+Reference = IC1;
+ValeurCmp = ATMEGA8-P;
+IdModule  = DIP-28__300_ELL;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79BD0D;
+Reference = J1;
+ValeurCmp = USB;
+IdModule  = USB_B;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C7D1001;
+Reference = P1;
+ValeurCmp = Controls;
+IdModule  = SIL-14;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79C0F3;
+Reference = R1;
+ValeurCmp = 1.5kΩ;
+IdModule  = R4;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79C111;
+Reference = R2;
+ValeurCmp = 68Ω;
+IdModule  = R4;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79C109;
+Reference = R3;
+ValeurCmp = 68Ω;
+IdModule  = R4;
+EndCmp
+
+BeginCmp
+TimeStamp = /4C79CA95;
+Reference = X1;
+ValeurCmp = 12MHz;
+IdModule  = SIL-3;
+EndCmp
+
+EndListe

arccont/arccont.dsn

@@ -0,0 +1,291 @@
+(pcb /home/clay/kicad/arccont.dsn
+  (parser
+    (string_quote ")
+    (space_in_quoted_tokens on)
+    (host_cad "Kicad's PCBNEW")
+    (host_version "(2010-05-09 BZR 2366)-stable")
+  )
+  (resolution mil 10)
+  (unit mil)
+  (structure
+    (layer Front
+      (type signal)
+      (property
+        (index 0)
+      )
+    )
+    (layer Back
+      (type signal)
+      (property
+        (index 1)
+      )
+    )
+    (boundary
+      (rect pcb 800.7 -482.5 4516 -2806)
+    )
+    (via "Via[0-1]_35:25_mil" "Via[0-1]_35:0_mil")
+    (rule
+      (width 8)
+      (clearance 10.1)
+      (clearance 10.1 (type default_smd))
+      (clearance 2.5 (type smd_smd))
+    )
+  )
+  (placement
+    (component C1
+      (place C3 2450 -1450 front 0 (PN 27pf))
+      (place C2 3100 -750 front 0 (PN 27pf))
+      (place C1 2600 -2650 front 0 (PN 1µF))
+    )
+    (component D4
+      (place D3 1950 -1150 front 90 (PN 3.6V))
+      (place D2 1550 -900 front 270 (PN 3.6V))
+    )
+    (component "DIP-28__300"
+      (place IC1 2600 -2250 front 0 (PN "ATMEGA8-P"))
+    )
+    (component R4
+      (place R3 1800 -1500 front 0 (PN 68))
+      (place R2 1850 -2750 front 0 (PN 68))
+      (place R1 1100 -2000 front 0 (PN 1.5k))
+    )
+    (component "SIL-14"
+      (place P1 3800 -1200 front 0 (PN Controls))
+    )
+    (component "SIL-3"
+      (place X1 1850 -650 front 0 (PN 12MHz))
+    )
+    (component USB_B
+      (place J1 1100 -900 front 180 (PN USB))
+    )
+  )
+  (library
+    (image C1
+      (outline (path signal 12  -98 50  100 50))
+      (outline (path signal 12  100 50  100 -50))
+      (outline (path signal 12  100 -50  -100 -50))
+      (outline (path signal 12  -100 -50  -100 50))
+      (outline (path signal 12  -100 25  -75 50))
+      (pin Round[A]Pad_55_mil 1 -50 0)
+      (pin Round[A]Pad_55_mil 2 50 0)
+    )
+    (image D4
+      (outline (path signal 12  -150 50  150 50))
+      (outline (path signal 12  150 50  150 -50))
+      (outline (path signal 12  150 -50  -150 -50))
+      (outline (path signal 12  -150 -50  -150 50))
+      (outline (path signal 12  125 50  125 -50))
+      (outline (path signal 12  100 -50  100 50))
+      (outline (path signal 12  -150 0  -200 0))
+      (outline (path signal 12  150 0  200 0))
+      (pin Round[A]Pad_70_mil 1 -200 0)
+      (pin Rect[A]Pad_70x70_mil 2 200 0)
+    )
+    (image "DIP-28__300"
+      (outline (path signal 15  -750 100  750 100))
+      (outline (path signal 15  750 100  750 -100))
+      (outline (path signal 15  750 -100  -750 -100))
+      (outline (path signal 15  -750 -100  -750 100))
+      (outline (path signal 15  -750 50  -700 50))
+      (outline (path signal 15  -700 50  -700 -50))
+      (outline (path signal 15  -700 -50  -750 -50))
+      (pin Round[A]Pad_55_mil 2 -550 -150)
+      (pin Round[A]Pad_55_mil 3 -450 -150)
+      (pin Round[A]Pad_55_mil 4 -350 -150)
+      (pin Round[A]Pad_55_mil 5 -250 -150)
+      (pin Round[A]Pad_55_mil 6 -150 -150)
+      (pin Round[A]Pad_55_mil 7 -50 -150)
+      (pin Round[A]Pad_55_mil 8 50 -150)
+      (pin Round[A]Pad_55_mil 9 150 -150)
+      (pin Round[A]Pad_55_mil 10 250 -150)
+      (pin Round[A]Pad_55_mil 11 350 -150)
+      (pin Round[A]Pad_55_mil 12 450 -150)
+      (pin Round[A]Pad_55_mil 13 550 -150)
+      (pin Round[A]Pad_55_mil 14 650 -150)
+      (pin Rect[A]Pad_55x55_mil 1 -650 -150)
+      (pin Round[A]Pad_55_mil 15 650 150)
+      (pin Round[A]Pad_55_mil 16 550 150)
+      (pin Round[A]Pad_55_mil 17 450 150)
+      (pin Round[A]Pad_55_mil 18 350 150)
+      (pin Round[A]Pad_55_mil 19 250 150)
+      (pin Round[A]Pad_55_mil 20 150 150)
+      (pin Round[A]Pad_55_mil 21 50 150)
+      (pin Round[A]Pad_55_mil 22 -50 150)
+      (pin Round[A]Pad_55_mil 23 -150 150)
+      (pin Round[A]Pad_55_mil 24 -250 150)
+      (pin Round[A]Pad_55_mil 25 -350 150)
+      (pin Round[A]Pad_55_mil 26 -450 150)
+      (pin Round[A]Pad_55_mil 27 -550 150)
+      (pin Round[A]Pad_55_mil 28 -650 150)
+    )
+    (image R4
+      (outline (path signal 12  -200 0  -160 0))
+      (outline (path signal 12  -160 0  -160 40))
+      (outline (path signal 12  -160 40  160 40))
+      (outline (path signal 12  160 40  160 -40))
+      (outline (path signal 12  160 -40  -160 -40))
+      (outline (path signal 12  -160 -40  -160 0))
+      (outline (path signal 12  -160 20  -140 40))
+      (outline (path signal 12  200 0  160 0))
+      (pin Round[A]Pad_60_mil 1 -200 0)
+      (pin Round[A]Pad_60_mil 2 200 0)
+    )
+    (image "SIL-14"
+      (outline (path signal 12  -700 50  700 50))
+      (outline (path signal 12  700 50  700 -50))
+      (outline (path signal 12  700 -50  -700 -50))
+      (outline (path signal 12  -700 -50  -700 50))
+      (pin Rect[A]Pad_55x55_mil 1 -650 0)
+      (pin Round[A]Pad_55_mil 2 -550 0)
+      (pin Round[A]Pad_55_mil 3 -450 0)
+      (pin Round[A]Pad_55_mil 4 -350 0)
+      (pin Round[A]Pad_55_mil 5 -250 0)
+      (pin Round[A]Pad_55_mil 6 -150 0)
+      (pin Round[A]Pad_55_mil 7 -50 0)
+      (pin Round[A]Pad_55_mil 8 50 0)
+      (pin Round[A]Pad_55_mil 9 150 0)
+      (pin Round[A]Pad_55_mil 10 250 0)
+      (pin Round[A]Pad_55_mil 11 350 0)
+      (pin Round[A]Pad_55_mil 12 450 0)
+      (pin Round[A]Pad_55_mil 13 550 0)
+      (pin Round[A]Pad_55_mil 14 650 0)
+    )
+    (image "SIL-3"
+      (outline (path signal 12  -150 -50  -150 50))
+      (outline (path signal 12  -150 50  150 50))
+      (outline (path signal 12  150 50  150 -50))
+      (outline (path signal 12  150 -50  -150 -50))
+      (outline (path signal 12  -50 50  -50 -50))
+      (pin Rect[A]Pad_55x55_mil 1 -100 0)
+      (pin Round[A]Pad_55_mil 2 0 0)
+      (pin Round[A]Pad_55_mil 3 100 0)
+    )
+    (image USB_B
+      (outline (path signal 5  -240 -405  240 -405))
+      (outline (path signal 5  240 -405  240 265))
+      (outline (path signal 5  240 265  -240 265))
+      (outline (path signal 5  -240 265  -240 -405))
+      (pin Round[A]Pad_60_mil 1 50 185)
+      (pin Round[A]Pad_60_mil 2 -50 185)
+      (pin Round[A]Pad_60_mil 3 -50 106.3)
+      (pin Round[A]Pad_60_mil 4 50 106.3)
+      (pin Round[A]Pad_106.3_mil 5 236.2 0)
+      (pin Round[A]Pad_106.3_mil 6 -236.2 0)
+    )
+    (padstack Round[A]Pad_106.3_mil
+      (shape (circle Front 106.3))
+      (shape (circle Back 106.3))
+      (attach off)
+    )
+    (padstack Round[A]Pad_55_mil
+      (shape (circle Front 55))
+      (shape (circle Back 55))
+      (attach off)
+    )
+    (padstack Round[A]Pad_60_mil
+      (shape (circle Front 60))
+      (shape (circle Back 60))
+      (attach off)
+    )
+    (padstack Round[A]Pad_70_mil
+      (shape (circle Front 70))
+      (shape (circle Back 70))
+      (attach off)
+    )
+    (padstack Rect[A]Pad_55x55_mil
+      (shape (rect Front -27.5 -27.5 27.5 27.5))
+      (shape (rect Back -27.5 -27.5 27.5 27.5))
+      (attach off)
+    )
+    (padstack Rect[A]Pad_70x70_mil
+      (shape (rect Front -35 -35 35 35))
+      (shape (rect Back -35 -35 35 35))
+      (attach off)
+    )
+    (padstack "Via[0-1]_35:25_mil"
+      (shape (circle Front 35))
+      (shape (circle Back 35))
+      (attach off)
+    )
+    (padstack "Via[0-1]_35:0_mil"
+      (shape (circle Front 35))
+      (shape (circle Back 35))
+      (attach off)
+    )
+  )
+  (network
+    (net +5V
+      (pins C1-1 IC1-7 IC1-20 R1-1 P1-14 J1-1)
+    )
+    (net GND
+      (pins C3-2 C2-2 C1-2 D3-1 D2-1 IC1-8 IC1-22 P1-13 J1-4)
+    )
+    (net "N-000002"
+      (pins C2-1 IC1-9 X1-1)
+    )
+    (net "N-000003"
+      (pins C3-1 IC1-10 X1-2)
+    )
+    (net "N-000009"
+      (pins IC1-23 P1-6)
+    )
+    (net "N-000010"
+      (pins IC1-15 P1-11)
+    )
+    (net "N-000011"
+      (pins IC1-17 P1-9)
+    )
+    (net "N-000012"
+      (pins IC1-27 P1-2)
+    )
+    (net "N-000013"
+      (pins IC1-19 P1-7)
+    )
+    (net "N-000014"
+      (pins D3-2 R3-1 J1-3)
+    )
+    (net "N-000015"
+      (pins IC1-4 R3-2)
+    )
+    (net "N-000016"
+      (pins D2-2 R2-1 R1-2 J1-2)
+    )
+    (net "N-000020"
+      (pins IC1-2 IC1-3 R2-2)
+    )
+    (net "N-000023"
+      (pins IC1-24 P1-5)
+    )
+    (net "N-000024"
+      (pins IC1-26 P1-3)
+    )
+    (net "N-000025"
+      (pins IC1-28 P1-1)
+    )
+    (net "N-000026"
+      (pins IC1-18 P1-8)
+    )
+    (net "N-000027"
+      (pins IC1-16 P1-10)
+    )
+    (net "N-000028"
+      (pins IC1-14 P1-12)
+    )
+    (net "N-000029"
+      (pins IC1-25 P1-4)
+    )
+    (class kicad_default "" +5V GND "N-000002" "N-000003" "N-000009" "N-000010"
+      "N-000011" "N-000012" "N-000013" "N-000014" "N-000015" "N-000016" "N-000020"
+      "N-000023" "N-000024" "N-000025" "N-000026" "N-000027" "N-000028" "N-000029"
+      (circuit
+        (use_via Via[0-1]_35:25_mil)
+      )
+      (rule
+        (width 8)
+        (clearance 10.1)
+      )
+    )
+  )
+  (wiring
+  )
+)

arccont/arccont.lst

@@ -0,0 +1,33 @@
+eeschema (2010-05-09 BZR 2366)-stable  >> Creation date: Tue 31 Aug 2010 12:31:23 PM EDT
+
+#Cmp ( order = Reference )
+| C1         1µF        
+| C2         27pf        
+| C3         27pf        
+| D2         3.6V        
+| D3         3.6V        
+| IC1        ATMEGA8-P   
+| J1         USB         
+| P1         Controls    
+| R1         1.5kΩ      
+| R2         68Ω        
+| R3         68Ω        
+| X1         12MHz       
+#End Cmp
+
+#Cmp ( order = Value )
+| 1.5kΩ       R1        
+| 12MHz        X1        
+| 1µF         C1        
+| 27pf         C2        
+| 27pf         C3        
+| 3.6V         D2        
+| 3.6V         D3        
+| 68Ω         R2        
+| 68Ω         R3        
+| ATMEGA8-P    IC1       
+| Controls     P1        
+| USB          J1        
+#End Cmp
+
+#End List

arccont/arccont.pro

@@ -0,0 +1,111 @@
+update=Sun 02 Jan 2011 06:11:26 PM EST
+version=1
+last_client=eeschema
+[cvpcb]
+version=1
+NetITyp=0
+NetIExt=.net
+PkgIExt=.pkg
+NetDir=
+LibDir=
+NetType=0
+[cvpcb/libraries]
+EquName1=devcms
+[general]
+version=1
+[pcbnew]
+version=1
+PadDrlX=906
+PadDimH=1500
+PadDimV=1500
+BoardThickness=630
+SgPcb45=1
+TxtPcbV=800
+TxtPcbH=600
+TxtModV=600
+TxtModH=600
+TxtModW=120
+VEgarde=100
+DrawLar=150
+EdgeLar=150
+TxtLar=120
+MSegLar=150
+LastNetListRead=arccont.net
+[pcbnew/libraries]
+LibDir=
+LibName1=sockets
+LibName2=connect
+LibName3=discret
+LibName4=pin_array
+LibName5=divers
+LibName6=libcms
+LibName7=display
+LibName8=valves
+LibName9=led
+LibName10=dip_sockets
+[eeschema]
+version=1
+LibDir=
+NetFmt=1
+HPGLSpd=20
+HPGLDm=15
+HPGLNum=1
+offX_A4=0
+offY_A4=0
+offX_A3=0
+offY_A3=0
+offX_A2=0
+offY_A2=0
+offX_A1=0
+offY_A1=0
+offX_A0=0
+offY_A0=0
+offX_A=0
+offY_A=0
+offX_B=0
+offY_B=0
+offX_C=0
+offY_C=0
+offX_D=0
+offY_D=0
+offX_E=0
+offY_E=0
+RptD_X=0
+RptD_Y=100
+RptLab=1
+SimCmd=
+UseNetN=0
+LabSize=60
+PrintMonochrome=1
+ShowSheetReferenceAndTitleBlock=1
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=special
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves

arccont/arccont.sch

@@ -0,0 +1,432 @@
+EESchema Schematic File Version 2  date Tue 31 Aug 2010 12:31:28 PM EDT
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:special
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:arccont-cache
+EELAYER 24  0
+EELAYER END
+$Descr A4 11700 8267
+Sheet 1 1
+Title ""
+Date "31 aug 2010"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L +5V #PWR01
+U 1 1 4C7D1146
+P 5600 5300
+F 0 "#PWR01" H 5600 5390 20  0001 C CNN
+F 1 "+5V" H 5600 5390 30  0000 C CNN
+	1    5600 5300
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	5600 5300 5600 5400
+Wire Wire Line
+	5600 5400 5800 5400
+Wire Wire Line
+	5800 5400 5800 5200
+Wire Wire Line
+	5800 5200 5900 5200
+Wire Wire Line
+	5900 5100 5700 5100
+Wire Wire Line
+	5900 4900 5500 4900
+Wire Wire Line
+	5900 4700 5300 4700
+Wire Wire Line
+	5900 4500 5100 4500
+Wire Wire Line
+	5900 4300 5200 4300
+Wire Wire Line
+	5900 4100 5400 4100
+Wire Wire Line
+	5900 3900 5600 3900
+Wire Wire Line
+	1350 6100 1350 6300
+Wire Wire Line
+	1400 3400 1400 3700
+Wire Wire Line
+	1400 3700 1600 3700
+Wire Wire Line
+	800  5650 800  5250
+Connection ~ 800  4450
+Wire Wire Line
+	800  4850 800  4000
+Wire Wire Line
+	800  4000 1600 4000
+Wire Wire Line
+	3850 2550 3850 4400
+Wire Wire Line
+	3850 1500 3850 2050
+Wire Wire Line
+	1800 1500 3850 1500
+Wire Wire Line
+	1800 1650 4350 1650
+Wire Wire Line
+	2500 2800 2500 3000
+Wire Wire Line
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+Wire Wire Line
+	5200 3400 3500 3400
+Wire Wire Line
+	5400 4100 5400 3600
+Wire Wire Line
+	5400 3600 3500 3600
+Wire Wire Line
+	5600 3900 5600 3800
+Wire Wire Line
+	5600 3800 3500 3800
+Wire Wire Line
+	5200 5500 5200 4600
+Wire Wire Line
+	5200 5500 3500 5500
+Wire Wire Line
+	5400 5300 5400 4800
+Wire Wire Line
+	5400 5300 3500 5300
+Wire Wire Line
+	5600 5100 5600 5000
+Wire Wire Line
+	5600 5100 3500 5100
+Connection ~ 4350 4200
+Wire Wire Line
+	4350 4300 3500 4300
+Connection ~ 4350 1650
+Connection ~ 2800 1500
+Wire Wire Line
+	2400 1650 2400 1900
+Wire Wire Line
+	2400 2400 2800 2400
+Wire Wire Line
+	2400 2400 2400 2300
+Connection ~ 2400 1150
+Wire Wire Line
+	2700 1150 2050 1150
+Wire Wire Line
+	1050 1500 950  1500
+Wire Wire Line
+	950  1500 950  800 
+Wire Wire Line
+	950  800  2050 800 
+Wire Wire Line
+	2050 800  2050 1150
+Wire Wire Line
+	2400 1050 2400 1150
+Wire Wire Line
+	1050 1650 950  1650
+Wire Wire Line
+	950  1650 950  2200
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	3500 4200 4350 4200
+Wire Wire Line
+	3850 4400 3500 4400
+Wire Wire Line
+	3500 5200 5500 5200
+Wire Wire Line
+	5500 5200 5500 4900
+Wire Wire Line
+	3500 5400 5300 5400
+Wire Wire Line
+	5300 5400 5300 4700
+Wire Wire Line
+	3500 5600 5100 5600
+Wire Wire Line
+	5100 5600 5100 4500
+Wire Wire Line
+	3500 3700 5500 3700
+Wire Wire Line
+	5500 3700 5500 4000
+Wire Wire Line
+	3500 3500 5300 3500
+Wire Wire Line
+	5300 3500 5300 4200
+Wire Wire Line
+	3500 3300 5100 3300
+Wire Wire Line
+	5100 3300 5100 4400
+Wire Wire Line
+	2500 5900 2500 6100
+Wire Wire Line
+	4350 1150 3200 1150
+Wire Wire Line
+	4350 2050 4350 1150
+Wire Wire Line
+	4350 2550 4350 4300
+Wire Wire Line
+	1400 4200 1600 4200
+Wire Wire Line
+	1400 4850 1400 4200
+Connection ~ 1400 4450
+Wire Wire Line
+	1400 5250 1400 5450
+Wire Wire Line
+	1400 5450 800  5450
+Connection ~ 800  5450
+Wire Wire Line
+	1600 3500 1200 3500
+Wire Wire Line
+	1200 3500 1200 3600
+Wire Wire Line
+	1350 6700 1350 6900
+Wire Wire Line
+	5500 4000 5900 4000
+Wire Wire Line
+	5300 4200 5900 4200
+Wire Wire Line
+	5100 4400 5900 4400
+Wire Wire Line
+	5200 4600 5900 4600
+Wire Wire Line
+	5400 4800 5900 4800
+Wire Wire Line
+	5600 5000 5900 5000
+Wire Wire Line
+	5700 5100 5700 5300
+$Comp
+L GND #PWR02
+U 1 1 4C7D10E8
+P 5700 5300
+F 0 "#PWR02" H 5700 5300 30  0001 C CNN
+F 1 "GND" H 5700 5230 30  0001 C CNN
+	1    5700 5300
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_14 P1
+U 1 1 4C7D1001
+P 6250 4550
+F 0 "P1" V 6220 4550 60  0000 C CNN
+F 1 "Controls" V 6330 4550 60  0000 C CNN
+	1    6250 4550
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR03
+U 1 1 4C79CF7B
+P 1350 6900
+F 0 "#PWR03" H 1350 6900 30  0001 C CNN
+F 1 "GND" H 1350 6830 30  0001 C CNN
+	1    1350 6900
+	1    0    0    -1  
+$EndComp
+$Comp
+L +5V #PWR04
+U 1 1 4C79CF71
+P 1350 6100
+F 0 "#PWR04" H 1350 6190 20  0001 C CNN
+F 1 "+5V" H 1350 6190 30  0000 C CNN
+	1    1350 6100
+	1    0    0    -1  
+$EndComp
+$Comp
+L C C1
+U 1 1 4C79CF5E
+P 1350 6500
+F 0 "C1" H 1400 6600 50  0000 L CNN
+F 1 "1µF" H 1400 6400 50  0000 L CNN
+	1    1350 6500
+	1    0    0    -1  
+$EndComp
+$Comp
+L +5V #PWR05
+U 1 1 4C79CE97
+P 1400 3400
+F 0 "#PWR05" H 1400 3490 20  0001 C CNN
+F 1 "+5V" H 1400 3490 30  0000 C CNN
+	1    1400 3400
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR06
+U 1 1 4C79CE7A
+P 1200 3600
+F 0 "#PWR06" H 1200 3600 30  0001 C CNN
+F 1 "GND" H 1200 3530 30  0001 C CNN
+	1    1200 3600
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR07
+U 1 1 4C79CB2E
+P 800 5650
+F 0 "#PWR07" H 800 5650 30  0001 C CNN
+F 1 "GND" H 800 5580 30  0001 C CNN
+	1    800  5650
+	1    0    0    -1  
+$EndComp
+$Comp
+L C C2
+U 1 1 4C79CB04
+P 800 5050
+F 0 "C2" H 850 5150 50  0000 L CNN
+F 1 "27pf" H 850 4950 50  0000 L CNN
+	1    800  5050
+	1    0    0    -1  
+$EndComp
+$Comp
+L C C3
+U 1 1 4C79CADC
+P 1400 5050
+F 0 "C3" H 1450 5150 50  0000 L CNN
+F 1 "27pf" H 1450 4950 50  0000 L CNN
+	1    1400 5050
+	1    0    0    -1  
+$EndComp
+$Comp
+L CRYSTAL X1
+U 1 1 4C79CA95
+P 1100 4450
+F 0 "X1" H 1100 4600 60  0000 C CNN
+F 1 "12MHz" H 1100 4300 60  0000 C CNN
+	1    1100 4450
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR08
+U 1 1 4C79C93A
+P 2500 6100
+F 0 "#PWR08" H 2500 6100 30  0001 C CNN
+F 1 "GND" H 2500 6030 30  0001 C CNN
+	1    2500 6100
+	1    0    0    -1  
+$EndComp
+$Comp
+L +5V #PWR09
+U 1 1 4C79C923
+P 2500 2800
+F 0 "#PWR09" H 2500 2890 20  0001 C CNN
+F 1 "+5V" H 2500 2890 30  0000 C CNN
+	1    2500 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR010
+U 1 1 4C79C33D
+P 2800 2500
+F 0 "#PWR010" H 2800 2500 30  0001 C CNN
+F 1 "GND" H 2800 2430 30  0001 C CNN
+	1    2800 2500
+	1    0    0    -1  
+$EndComp
+$Comp
+L ZENER D3
+U 1 1 4C79C2F2
+P 2800 2100
+F 0 "D3" H 2800 2200 50  0000 C CNN
+F 1 "3.6V" H 2800 2000 40  0000 C CNN
+	1    2800 2100
+	0    1    -1   0   
+$EndComp
+$Comp
+L R R2
+U 1 1 4C79C111
+P 4350 2300
+F 0 "R2" V 4430 2300 50  0000 C CNN
+F 1 "68Ω" V 4350 2300 50  0000 C CNN
+	1    4350 2300
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+$EndComp
+$Comp
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+P 3850 2300
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+F 1 "68Ω" V 3850 2300 50  0000 C CNN
+	1    3850 2300
+	1    0    0    -1  
+$EndComp
+$Comp
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+U 1 1 4C79C0F3
+P 2950 1150
+F 0 "R1" V 3030 1150 50  0000 C CNN
+F 1 "1.5kΩ" V 2950 1150 50  0000 C CNN
+	1    2950 1150
+	0    -1   -1   0   
+$EndComp
+$Comp
+L ZENER D2
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+P 2400 2100
+F 0 "D2" H 2400 2200 50  0000 C CNN
+F 1 "3.6V" H 2400 2000 40  0000 C CNN
+	1    2400 2100
+	0    1    -1   0   
+$EndComp
+$Comp
+L +5V #PWR011
+U 1 1 4C79BDC2
+P 2400 1050
+F 0 "#PWR011" H 2400 1140 20  0001 C CNN
+F 1 "+5V" H 2400 1140 30  0000 C CNN
+	1    2400 1050
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR012
+U 1 1 4C79BDAC
+P 950 2200
+F 0 "#PWR012" H 950 2200 30  0001 C CNN
+F 1 "GND" H 950 2130 30  0001 C CNN
+	1    950  2200
+	1    0    0    -1  
+$EndComp
+$Comp
+L USB J1
+U 1 1 4C79BD0D
+P 1450 1300
+F 0 "J1" H 1400 1700 60  0000 C CNN
+F 1 "USB" V 1200 1450 60  0000 C CNN
+	1    1450 1300
+	1    0    0    -1  
+$EndComp
+$Comp
+L ATMEGA8-P IC1
+U 1 1 4C79BAC2
+P 2500 4400
+F 0 "IC1" H 1800 5650 50  0000 L BNN
+F 1 "ATMEGA8-P" H 2750 3000 50  0000 L BNN
+F 2 "DIL28" H 3000 2925 50  0001 C CNN
+	1    2500 4400
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC

arccont/arccont_b.pro

@@ -0,0 +1,32 @@
+update=Sat 12 Feb 2011 03:20:13 PM EST
+last_client=pcbnew
+[pcbnew]
+version=1
+PadDrlX=320
+PadDimH=600
+PadDimV=600
+BoardThickness=630
+SgPcb45=1
+TxtPcbV=800
+TxtPcbH=600
+TxtModV=600
+TxtModH=600
+TxtModW=120
+VEgarde=100
+DrawLar=150
+EdgeLar=150
+TxtLar=120
+MSegLar=150
+LastNetListRead=
+[pcbnew/libraries]
+LibDir=
+LibName1=sockets
+LibName2=connect
+LibName3=discret
+LibName4=pin_array
+LibName5=divers
+LibName6=libcms
+LibName7=display
+LibName8=valves
+LibName9=led
+LibName10=dip_sockets