Firmware for the remote control translator
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mcuconf.h 7.4KB

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  1. /*
  2. ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
  3. Licensed under the Apache License, Version 2.0 (the "License");
  4. you may not use this file except in compliance with the License.
  5. You may obtain a copy of the License at
  6. http://www.apache.org/licenses/LICENSE-2.0
  7. Unless required by applicable law or agreed to in writing, software
  8. distributed under the License is distributed on an "AS IS" BASIS,
  9. WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10. See the License for the specific language governing permissions and
  11. limitations under the License.
  12. */
  13. #ifndef MCUCONF_H
  14. #define MCUCONF_H
  15. #define STM32F103_MCUCONF
  16. /*
  17. * STM32F103 drivers configuration.
  18. * The following settings override the default settings present in
  19. * the various device driver implementation headers.
  20. * Note that the settings for each driver only have effect if the whole
  21. * driver is enabled in halconf.h.
  22. *
  23. * IRQ priorities:
  24. * 15...0 Lowest...Highest.
  25. *
  26. * DMA priorities:
  27. * 0...3 Lowest...Highest.
  28. */
  29. /*
  30. * HAL driver system settings.
  31. */
  32. #define STM32_NO_INIT FALSE
  33. #define STM32_HSI_ENABLED TRUE
  34. #define STM32_LSI_ENABLED FALSE
  35. #define STM32_HSE_ENABLED TRUE
  36. #define STM32_LSE_ENABLED TRUE
  37. #define STM32_SW STM32_SW_PLL
  38. #define STM32_PLLSRC STM32_PLLSRC_HSE
  39. #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
  40. #define STM32_PLLMUL_VALUE 9
  41. #define STM32_HPRE STM32_HPRE_DIV1
  42. #define STM32_PPRE1 STM32_PPRE1_DIV2
  43. #define STM32_PPRE2 STM32_PPRE2_DIV2
  44. #define STM32_ADCPRE STM32_ADCPRE_DIV4
  45. #define STM32_USB_CLOCK_REQUIRED TRUE
  46. #define STM32_USBPRE STM32_USBPRE_DIV1P5
  47. #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
  48. #define STM32_RTCSEL STM32_RTCSEL_LSE
  49. #define STM32_PVD_ENABLE FALSE
  50. #define STM32_PLS STM32_PLS_LEV0
  51. /*
  52. * ADC driver system settings.
  53. */
  54. #define STM32_ADC_USE_ADC1 FALSE
  55. #define STM32_ADC_ADC1_DMA_PRIORITY 2
  56. #define STM32_ADC_ADC1_IRQ_PRIORITY 6
  57. /*
  58. * CAN driver system settings.
  59. */
  60. #define STM32_CAN_USE_CAN1 FALSE
  61. #define STM32_CAN_CAN1_IRQ_PRIORITY 11
  62. /*
  63. * EXT driver system settings.
  64. */
  65. #define STM32_EXT_EXTI0_IRQ_PRIORITY 6
  66. #define STM32_EXT_EXTI1_IRQ_PRIORITY 6
  67. #define STM32_EXT_EXTI2_IRQ_PRIORITY 6
  68. #define STM32_EXT_EXTI3_IRQ_PRIORITY 6
  69. #define STM32_EXT_EXTI4_IRQ_PRIORITY 6
  70. #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
  71. #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
  72. #define STM32_EXT_EXTI16_IRQ_PRIORITY 6
  73. #define STM32_EXT_EXTI17_IRQ_PRIORITY 6
  74. #define STM32_EXT_EXTI18_IRQ_PRIORITY 6
  75. #define STM32_EXT_EXTI19_IRQ_PRIORITY 6
  76. /*
  77. * GPT driver system settings.
  78. */
  79. #define STM32_GPT_USE_TIM1 FALSE
  80. #define STM32_GPT_USE_TIM2 FALSE
  81. #define STM32_GPT_USE_TIM3 FALSE
  82. #define STM32_GPT_USE_TIM4 TRUE
  83. #define STM32_GPT_USE_TIM5 FALSE
  84. #define STM32_GPT_USE_TIM8 FALSE
  85. #define STM32_GPT_TIM1_IRQ_PRIORITY 7
  86. #define STM32_GPT_TIM2_IRQ_PRIORITY 7
  87. #define STM32_GPT_TIM3_IRQ_PRIORITY 7
  88. #define STM32_GPT_TIM4_IRQ_PRIORITY 7
  89. #define STM32_GPT_TIM5_IRQ_PRIORITY 7
  90. #define STM32_GPT_TIM8_IRQ_PRIORITY 7
  91. /*
  92. * I2C driver system settings.
  93. */
  94. #define STM32_I2C_USE_I2C1 FALSE
  95. #define STM32_I2C_USE_I2C2 FALSE
  96. #define STM32_I2C_BUSY_TIMEOUT 50
  97. #define STM32_I2C_I2C1_IRQ_PRIORITY 5
  98. #define STM32_I2C_I2C2_IRQ_PRIORITY 5
  99. #define STM32_I2C_I2C1_DMA_PRIORITY 3
  100. #define STM32_I2C_I2C2_DMA_PRIORITY 3
  101. #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
  102. /*
  103. * ICU driver system settings.
  104. */
  105. #define STM32_ICU_USE_TIM1 FALSE
  106. #define STM32_ICU_USE_TIM2 FALSE
  107. #define STM32_ICU_USE_TIM3 TRUE
  108. #define STM32_ICU_USE_TIM4 FALSE
  109. #define STM32_ICU_USE_TIM5 FALSE
  110. #define STM32_ICU_USE_TIM8 FALSE
  111. #define STM32_ICU_TIM1_IRQ_PRIORITY 7
  112. #define STM32_ICU_TIM2_IRQ_PRIORITY 7
  113. #define STM32_ICU_TIM3_IRQ_PRIORITY 7
  114. #define STM32_ICU_TIM4_IRQ_PRIORITY 7
  115. #define STM32_ICU_TIM5_IRQ_PRIORITY 7
  116. #define STM32_ICU_TIM8_IRQ_PRIORITY 7
  117. /*
  118. * PWM driver system settings.
  119. */
  120. #define STM32_PWM_USE_ADVANCED FALSE
  121. #define STM32_PWM_USE_TIM1 TRUE
  122. #define STM32_PWM_USE_TIM2 FALSE
  123. #define STM32_PWM_USE_TIM3 FALSE
  124. #define STM32_PWM_USE_TIM4 FALSE
  125. #define STM32_PWM_USE_TIM5 FALSE
  126. #define STM32_PWM_USE_TIM8 FALSE
  127. #define STM32_PWM_TIM1_IRQ_PRIORITY 7
  128. #define STM32_PWM_TIM2_IRQ_PRIORITY 7
  129. #define STM32_PWM_TIM3_IRQ_PRIORITY 7
  130. #define STM32_PWM_TIM4_IRQ_PRIORITY 7
  131. #define STM32_PWM_TIM5_IRQ_PRIORITY 7
  132. #define STM32_PWM_TIM8_IRQ_PRIORITY 7
  133. /*
  134. * RTC driver system settings.
  135. */
  136. #define STM32_RTC_IRQ_PRIORITY 15
  137. /*
  138. * SERIAL driver system settings.
  139. */
  140. #define STM32_SERIAL_USE_USART1 FALSE
  141. #define STM32_SERIAL_USE_USART2 TRUE
  142. #define STM32_SERIAL_USE_USART3 FALSE
  143. #define STM32_SERIAL_USE_UART4 FALSE
  144. #define STM32_SERIAL_USE_UART5 FALSE
  145. #define STM32_SERIAL_USART1_PRIORITY 12
  146. #define STM32_SERIAL_USART2_PRIORITY 12
  147. #define STM32_SERIAL_USART3_PRIORITY 12
  148. #define STM32_SERIAL_UART4_PRIORITY 12
  149. #define STM32_SERIAL_UART5_PRIORITY 12
  150. /*
  151. * SPI driver system settings.
  152. */
  153. #define STM32_SPI_USE_SPI1 FALSE
  154. #define STM32_SPI_USE_SPI2 FALSE
  155. #define STM32_SPI_USE_SPI3 FALSE
  156. #define STM32_SPI_SPI1_DMA_PRIORITY 1
  157. #define STM32_SPI_SPI2_DMA_PRIORITY 1
  158. #define STM32_SPI_SPI3_DMA_PRIORITY 1
  159. #define STM32_SPI_SPI1_IRQ_PRIORITY 10
  160. #define STM32_SPI_SPI2_IRQ_PRIORITY 10
  161. #define STM32_SPI_SPI3_IRQ_PRIORITY 10
  162. #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
  163. /*
  164. * ST driver system settings.
  165. */
  166. #define STM32_ST_IRQ_PRIORITY 8
  167. #define STM32_ST_USE_TIMER 2
  168. /*
  169. * UART driver system settings.
  170. */
  171. #define STM32_UART_USE_USART1 FALSE
  172. #define STM32_UART_USE_USART2 FALSE
  173. #define STM32_UART_USE_USART3 FALSE
  174. #define STM32_UART_USART1_IRQ_PRIORITY 12
  175. #define STM32_UART_USART2_IRQ_PRIORITY 12
  176. #define STM32_UART_USART3_IRQ_PRIORITY 12
  177. #define STM32_UART_USART1_DMA_PRIORITY 0
  178. #define STM32_UART_USART2_DMA_PRIORITY 0
  179. #define STM32_UART_USART3_DMA_PRIORITY 0
  180. #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
  181. /*
  182. * USB driver system settings.
  183. */
  184. #define STM32_USB_USE_USB1 FALSE
  185. #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
  186. #define STM32_USB_USB1_HP_IRQ_PRIORITY 13
  187. #define STM32_USB_USB1_LP_IRQ_PRIORITY 14
  188. /*
  189. * WDG driver system settings.
  190. */
  191. #define STM32_WDG_USE_IWDG FALSE
  192. #endif /* MCUCONF_H */